ResearchWho?
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    강진구
    Position 교수
    Current Department 인하대학교 공과대학 전자공학과
    프로필
    연구 성과
    논문[8]
    #8. A Low-Cost Fully Integer-Based CNN Accelerator on FPGA for Real-Time Traffic Sign Recognition
    Journal Information 2022 · IEEE Access
    Identifier (DOI) https://doi.org/10.1109/ACCESS.2022.3197906
    #7. Target Capacity Filter Pruning Method for Optimized Inference Time Based on YOLOv5 in Embedded Systems
    Journal Information 2022 · IEEE Access
    Identifier (DOI) https://doi.org/10.1109/ACCESS.2022.3188323
    발표[23]
    #23. Design of 20Gb/s PAM4 Transmitter with Maximum Transition Elimination and Transition Compensation Techniques
    Organization 2021 18th International SoC Design Conference (ISOCC)
    Date 2021.10
    #22. An 8 - 26 Gb/s Single Loop Reference-less CDR with Unrestricted Frequency Acquisition
    Organization 2021 18th International SoC Design Conference (ISOCC)
    Date 2021.10
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