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논문[2]
#2. Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication
2005.4 · IEEE Transactions on Very Large Scale Integration (VLSI) Systems
(DOI) https://doi.org/10.1109/TVLSI.2004.842908
#1. Sibling-substitution-based BDD minimization using don't cares
2000.1 · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
(DOI) https://doi.org/10.1109/43.822619
발표[4]
#4. An asynchronous matrix-vector multiplier for discrete cosine transform
Proceedings of the 2000 International Symposium on Low Power Electronics and Design
2000
#3. Symbolic reachability analysis of large finite state machines using don't cares
Automation and Test in Europe Conference and Exhibition
1999
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