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서울대학교 공과대학 전기·정보공학부

논문[119]

#119. A 48 Gb/s PAM-4 Receiver With Pre-Cursor Adjustable Baud-Rate Phase Detector in 40 nm CMOS

2022.10.21 · IEEE Journal of Solid-State Circuits

(DOI) https://doi.org/10.1109/jssc.2022.3212541

#118. An Output-Capacitor-Free Synthesizable Digital LDO Using CMP-Triggered Oscillator and Droop Detector

2022.10.21 · IEEE Journal of Solid-State Circuits

(DOI) https://doi.org/10.1109/jssc.2022.3213778