ResearchWho?

김재하

Associate Professor

서울대학교 공과대학 전기·정보공학부

논문[35]

#35. A 2.5–32 Gb/s Gen 5-PCIe Receiver With Multi-Rate CDR Engine and Hybrid DFE

2022.2.23 · IEEE Transactions on Circuits and Systems II: Express Briefs · 69(6):2677-2681

(DOI) https://doi.org/10.1109/TCSII.2022.3153396

#34. Fast Validation of Mixed-Signal SoCs

2021.10.25 · IEEE Open Journal of the Solid-State Circuits Society · 1:184-195

(DOI) https://doi.org/10.1109/OJSSCS.2021.3122397

프로시딩[59]

#59. A Gradient-Descent Calibration Method to Mitigate Process Variations in Analog Synapse Arrays

2022.2.06:1-4

(DOI) https://doi.org/10.1109/ICEIC54506.2022.9748777

#58. A Time-Multiplexing Multi-Input Hybrid Harvester with Low-Power MPPT Technique

2021.11.01:1-4

(DOI) https://doi.org/10.1109/ICCE-Asia53811.2021.9641883