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성효진

겸임교수

포항공과대학교 컴퓨터공학과

논문[22]

#22. Runtime Support for Accelerating CNN Models on Digital DRAM Processing-in-Memory Hardware

2022.7 · IEEE Computer Architecture Letters 21(2):1-4

(DOI) https://doi.org/10.1109/LCA.2022.3182363

#21. One-shot tuner for deep learning compilers

2022.3

(DOI) https://doi.org/10.1145/3497776.3517774

프로시딩[2]

#2. Eliminating on-chip traffic waste: are we there yet?

2015.3.29:163-164

(DOI) https://doi.org/10.1109/ISPASS.2015.7095798

#1. DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism

2011.10.10:155-166

(DOI) https://doi.org/10.1109/PACT.2011.21

특허[1]

#1. Verification Method and Apparatus

[등록] 7617426

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