장경욱
겸임교수
성균관대학교 정보통신대학 전자전기공학부
논문[5]
#5. Design-Aware Partitioning-Based 3-D IC Design Flow With 2-D Commercial Tools
2022.3 · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2022.3 · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
#4. High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors
2021.6 · IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2021.6 · IEEE Transactions on Very Large Scale Integration (VLSI) Systems
발표[11]
#11. Pin-3D: A Physical Synthesis and Post-Layout Optimization Flow for Heterogeneous Monolithic 3D ICs
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
2020.11
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
2020.11
#10. VLSI Placement Parameter Optimization using Deep Reinforcement Learning
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
2020.11
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
2020.11
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