ResearchWho?

한태희

교수

성균관대학교 정보통신대학 반도체시스템공학과

논문[9]

#9. On-the-Fly Lowering Engine: Offloading Data Layout Conversion for Convolutional Neural Networks

2022 · IEEE Access

(DOI) https://doi.org/10.1109/ACCESS.2022.3192618

#8. Rapid Topology Generation and Core Mapping of Optical Network-on-Chip for Heterogeneous Computing Platform

2021 · IEEE Access

(DOI) https://doi.org/10.1109/ACCESS.2021.3102270

발표[10]

#10. Reliability Optimization of ReRAM Architecture using Heterogeneous Error Correcting Code Scheme

2018 International SoC Design Conference (ISOCC)

2018.11

#9. Non-linear library characterization method for FinFET logic cells by L1-minimization

2017 IEEE International Symposium on Circuits and Systems (ISCAS)

2017.5