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성균관대학교 정보통신대학 반도체시스템공학과

논문[101]

#101. Fast and Efficient Offset Compensation by Noise-Aware Pre-charge and Operation of DRAM Bit Line Sense Amplifier

2022.12.06 · IEEE Transactions on Circuits and Systems Ii: Express Briefs

(DOI) https://doi.org/10.1109/tcsii.2022.3226762

#100. A 5.67 ENOB Vector Matrix Multiplier with Charge Storage FET Cells and Non-Linearity Compensation Techniques

2022.9.14 · Electronics

(DOI) https://doi.org/10.3390/electronics11182911

프로시딩[50]

#50. Quick and Efficient Offset Compensation by Noise-Aware Operation of DRAM Bit Line Sense Amplifier

2022.7.05:497-500

(DOI) https://doi.org/10.1109/ITC-CSCC55581.2022.9895036

#49. Charge-Trap based VMM design compensated for non-linearity through Reference Read

2022.7.05:593-596

(DOI) https://doi.org/10.1109/ITC-CSCC55581.2022.9895021

특허[11]

#11. 밴드갭 코어 두 개와 스위치를 사용하여 공급전압을 레귤레이팅 밴드갭 레퍼런스 회로

[출원] 10-2011-0144872

대한민국

#10. 반도체 메모리 장치, 검증 독출 방법 및 시스템

[출원] 10-2012-0153450

대한민국